Posted On Apr 08

Senior Software Engineer - Machine Learning


Location : Hyderabad, Telangana

Headquarters : San Jose, California, United States

Hiring Mode : Full Time

Hiring Role : Developer

Experience : Senior Level


  • At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.
  • Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and improve people's lives.
  • If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care deeply about creating significant development experiences while building a strong sense of belonging and connection. We champion an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.
  • Xilinx is looking for a talented individual to join the Machine Learning team of Software Programmability Solutions group in the position of Senior SW Engineer/Architect. This is an opportunity to develop optimized ML library for Xilinx’s 7nm Versal devices targeting AI Engine cores. You will be working with state-of-the-art machine learning algorithms and architecting the realization of these algorithms on AI Engine cores. Hands-on experience with multicore processor programming and C/C++ code optimization for VLIW DSP processors are essential requirements for this position.  A strong knowledge of converting floating-point algorithms to fixed-point arithmetic is a must. Hands-on experience with FPGA design flows, FPGA architecture, system design, system integration, DDR memory interfaces and realizing high-performance FPGA-optimized designs and verification methodologies are also critical for the position.

Key Responsibilities

  • Responsible for design, optimization and testing of ML compute processing like 2D/3D convolutions, batch normalization, pooling, GEMM etc and fixed precision implementation and test with Python, embedded C/C++
  • Optimized ML library development and testing for VLIW-SIMD processors in fixed point int4, int8, int16 and floating point.
  • Work closely with algorithm and design teams in US, Europe and India offices.
  • Candidate will participate in different phases of a project, including architecture, system design, coding, unit testing, integration and maintenance and customer support.
  • Create internal and external facing detailed documentation (micro-architecture design documents, test specifications, test reports, user guides, etc.)

Technical Skill Requirements

  • PhD or MSEE preferred.
  • 5+ years of experience working on optimized library development for GPU and/or SIMD and VLIW processor architectures.
  • Experience in partitioning problems for execution on a multicore processor system with latency, bandwidth and memory utilization tradeoffs.
  • Proficient in C/C++, Python and various ML frameworks like TensorFlow, PyTorch etc.
  • Must have strong competency in understanding and analyzing complex signal processing and computer vision algorithms.
  • Ability to translate a compute algorithm into fixed point hardware implementation.
  • Excellent written and verbal communication skills in English.
  • Experience creating internal and/or customer facing detailed documentation.